Parisian Master of Research in Computer Science
Master Parisien de Recherche en Informatique (MPRI)

Differences

This shows you the differences between two versions of the page.

Link to this comparison view

cours:c-2-37-1 [2019/01/24 10:21]
fzn [Lectures]
cours:c-2-37-1 [2019/12/05 09:21] (current)
maranget [Lectures]
Line 1: Line 1:
-====== Semantics, languages and algorithms for multicore programming (24h, 3ECTS) ======+====== Programming shared memory multicore machines(24h, 3ECTS) ======
  
-Person in charge: [[http://www-rocq.inria.fr/~acohen|Albert Cohen]] (INRIA and DI, École Normale Supérieure)+Person in charge: [[http://gallium.inria.fr/~maranget|Luc Maranget]] (INRIA) 
 + 
 +<html><span style="color:red;font-size:200%;">&#x26a0 Important: le cours du jeudi 5 décembre 2019 est annulé.&#x26a0</span></html>
  
 ===== Teachers ===== ===== Teachers =====
  
-  - Relaxed-memory concurrency, from hardware to programming languages (6h): [[http://moscova.inria.fr/~zappa|Francesco Zappa Nardelli]] +  - Relexed Memory Concurrency (12h): [[http://gallium.inria.fr/~maranget|Luc Maranget]] 
-  - Modern concurrent algorithms (9h): [[http://moscova.inria.fr/~maranget|Luc Maranget]] +  - Runtime systems and task-parallel languages (12h): [[https://www.irif.fr/~guatto/|Adrien Guatto]]
-  - Runtime systems and task-parallel languages (9h): [[http://www-rocq.inria.fr/~acohen|Albert Cohen]]+
  
  
Line 36: Line 37:
 The aim of this module is to introduce some of the theory and the practice of concurrent programming, from hardware memory models and the design of high-level programming languages to the correctness of concurrent algorithms.  In particular, we will: The aim of this module is to introduce some of the theory and the practice of concurrent programming, from hardware memory models and the design of high-level programming languages to the correctness of concurrent algorithms.  In particular, we will:
   * give a formal and precise overview of the semantics of modern multiprocessor architectures, including x86 and Power/ARM;   * give a formal and precise overview of the semantics of modern multiprocessor architectures, including x86 and Power/ARM;
-  * illustrate how common compiler optimisations are source of unexpected behaviours, and will discuss the design of the memory model of high-level programming languages, including C++11 and Java; +  * illustrate how common compiler optimisations are source of unexpected behaviours, and will discuss the design of the memory model of high-level programming languages; 
-  * investigate the design of modern run-time and code generation for high-level parallel programming languages; +  * study the design and correctness of modern concurrent algorithms.
-  * study the design and correctness of modern concurrent algorithms and data-structures.+
  
 Some familiarity with discrete mathematics (sets, partial orders, etc.) and with sequential programming will be assumed, and experience with operational semantics and with some concurrent programming would be helpful.  However the course will be self-contained. Some familiarity with discrete mathematics (sets, partial orders, etc.) and with sequential programming will be assumed, and experience with operational semantics and with some concurrent programming would be helpful.  However the course will be self-contained.
Line 44: Line 44:
 ===== Lectures =====  ===== Lectures ===== 
  
-On Thursday, 16h15--19h15, room 1004+On Thursday, 16h15--19h15, room 1014
  
 +/**
 | 6/12 | Francesco Zappa Nardelli | [[http://www.di.ens.fr/~zappa/teaching/mpri/2018|Hardware memory models: x86 and Power/ARM]] |  | 6/12 | Francesco Zappa Nardelli | [[http://www.di.ens.fr/~zappa/teaching/mpri/2018|Hardware memory models: x86 and Power/ARM]] | 
 | 13/12, 20/12, 10/1 | Luc Maranget | [[http://gallium.inria.fr/~maranget/MPRI/|lecture notes and additional material]]| | 13/12, 20/12, 10/1 | Luc Maranget | [[http://gallium.inria.fr/~maranget/MPRI/|lecture notes and additional material]]|
Line 52: Line 53:
 | ??? | Exercises | Bring your laptop | | ??? | Exercises | Bring your laptop |
 | 7/3  | Final exam             | Documents and (airplane mode) laptops allowed | | 7/3  | Final exam             | Documents and (airplane mode) laptops allowed |
 +**/
  
 /** /**
 
Universités partenaires Université Paris-Diderot
Université Paris-Saclay
ENS Cachan École polytechnique Télécom ParisTech
ENS
Établissements associés Université Pierre-et-Marie-Curie CNRS INRIA CEA